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Question added by Sonam Sah Digital Marketing Sadku
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Question added by Rostom El Baz ICT-Project Engineer Alghanim International
10 years ago
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Question added by SIMI ABDUL MANAF SALEENA LECTURER SHM ENGINEERING COLLEGE
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Answer added by  Farzad Hashemi, Technical Manager, Iris Combine Electronics Co., Ltd
6 years ago

Latch is sensitive to Clock level so it is level sensitive. For example output of a positive level sensitive latch is equal to input until the clock signal is equals 1 an ... See More

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Answer added by  Rohini V
7 years ago

The latches and Flip Flops have an important role in all digital logic circuits. Flip Flops (FF) and latches are the sequential logic circuits. They depend on the current ... See More

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Answer added by  Salman Hassan, Constable, Punjab police department
7 years ago

ok i have no objection  i am also glad to know that you are helping me..