Trending Verilog A Discussions

Follow

Ask the Community


Ask any professional question and get answers from other specialists.

Stream language
PAPPU MAJUMDER's image
Question added by PAPPU MAJUMDER Microsoft Business intelligence (MSBI) Equifax
8 years ago
Answers:
7
Followers:
Views:
294
Vote Count:
2
Answer should contain a minimum of 25 characters.
Lone Hameem's image
Question added by Lone Hameem trainee sigma computing PVT LTD
8 years ago
Answers:
0
Followers:
Views:
27
Vote Count:
0
Answer should contain a minimum of 25 characters.
Taifoor Zarin's image
Question added by Taifoor Zarin Secretary General Khyber Pakhtunkhwa Cycling Association
7 years ago
Answers:
1
Followers:
Views:
2
Vote Count:
1
Answer should contain a minimum of 25 characters.
Prateek Gupta's image  
Answer added by  Prateek Gupta
8 years ago

always @(posedge clk)x = 2; always @(posedge clk)y = x; YOU CAN HOLD THE COMMAND BY GIVING THE CONDITION AS THE CLOCK VALUE AND POSEDGE OR NEGEDGE

Mishal Ferrao's image  
Answer added by  Mishal Ferrao
6 years ago

If the order in which the assignment statements or  expressions are exceuted cannot be guaranteed then it is called racism in verilog.

GUJJARI  ANURADHA's image  
Answer added by  GUJJARI ANURADHA
6 years ago

program can implemented in 3 modules gate level module data level module behavioural moudule

Shazia Tariq's image  
Answer added by  Shazia Tariq, Assistant Administrator, Critical Mass Company
7 years ago

Software & language i guess

SHIBINU RAZAK's image  
Answer added by  SHIBINU RAZAK, Sales consultant and customer service , Signature global migration
8 years ago

A race condition is a flaw in a system or process that is characterized by an output that exhibits an unexpected dependence on the relative timing or ordering of events. ... See More

Rajesh Panda's image  
Answer added by  Rajesh Panda
8 years ago

If there is no certainty of a wire getting value 0 or 1 , means if both 0 or 1 value can be possible , that condition is called race . There are 4 types of race. WRITE-WR ... See More

B Majumder's image  
Answer added by  B Majumder
8 years ago

● Active Region – Execute in any order – Blocking Assignments – Evaluate RHS of NBAs – Continuous Assignments – $display ● Inactive Region – #0 Blocking Assignments ● Non ... See More