Communiquez avec les autres et partagez vos connaissances professionnelles

Inscrivez-vous ou connectez-vous pour rejoindre votre communauté professionnelle.

Suivre

Whats the feature of Watch dog Timer?

user-image
Question ajoutée par Fayaz Ahammed M , Quality Assurance Engineer , Amara Raja Batteries Limited
Date de publication: 2015/01/08
PAPPU MAJUMDER
par PAPPU MAJUMDER , Microsoft Business intelligence (MSBI) , Equifax

A timing device such that it is set for a 

preset time interval and an event must occur 

during that interval else the device will 

generate the timeout signal on failure to get 

that event in the watched time interval.

On that event, the watchdog timer is 

disabled to disable generation of timeout or 

reset 

Timeout may result in processor start a 

service routine or start from beginning

Utilisateur supprimé
par Utilisateur supprimé

timer used to recover malfunction

 

detect and trigger a processor reset

Yahia Altakriti
par Yahia Altakriti , System Engineer , MYCOM OSI

watch dog timer is very important feature for any critical part in your project where the time for this part (some of instructions ) exceeds the configure time , microcontroller will reset Automatically

sagarlal LB
par sagarlal LB , Sr. E&I Engineer @ Advanced Precision Service Co. , Advance Precision Services Co.

electronic timer which used to detect and recover from malfunction of computer during normal operation

Mohamed KARRAY
par Mohamed KARRAY , Associate Professor , ESME sudria

Restart the system if any instructions is excuted more times.

Control reset pin function

Selectable clock source

watchdog mode

interval mode

Mohammed Elsadig
par Mohammed Elsadig , Lecturer , University of medical sciences and technology

Watchdog timer is reponsible for reset the CPU if hang.

Dayal Dhandapani
par Dayal Dhandapani , Embedded developer , Trinity Mobility Pvt Ltd

It's a timer which can be set to certain time in a microcontroller, which recovers the controller from getting into malfunctioning or not working state when timer time is reached.

Ramil Natan
par Ramil Natan , Communication Engineer/Switching Network Engineer , O & M Directorate of KKMC, Ministry of Defense and Aviation

The WDT is similar to the Master Clear External Reset on a hardware, when activated and place the Program Counter back to the beginning of the program software (org 0). The WDT is activated when its time-out period is exceeded. It is a free running timer independent of ...

محمد سيد عبد المطلب
par محمد سيد عبد المطلب , Trainee , El-Ahly Channel

used to reset the system if the compiler stucked in any instruction 

More Questions Like This